A phase-locked loop circuit is used, for instance, for a frequency synthesizer type radio receiver, in which it is required that a tuning speed of an auto-tuning system and an operation speed of an AF (alternative frequency) system in an RDS (radio data system) broadcasting network recently introduced in Europe are increased. For this purpose, a lock-up time is required to be shortened in the phase-locked loop circuit.
One type of a conventional phase-locked loop circuit comprises a voltage controlled oscillator used as a local oscillator in a frequency synthesizer type radio receiver. The voltage controlled oscillator is controlled to provide an oscillation signal having a predetermined frequency by a voltage having a value dependent on a phase relation between the oscillation signal and a reference signal having a reference frequency. The control voltage is of an intermittently generated pulse having a pulse width and a pulse period which are determined by charge and discharge times based on the phase relation. As a result of applying the intermittent pulse to the voltage controlled oscillator, a frequency of an oscillation signal is locked up to be a predetermined value, so that the oscillation signal is mixed as a local oscillation signal with a receiving signal in a radio receiver.
According to the conventional phase-locked loop circuit, however, there is a disadvantage in that the lock-up speed is not fast sufficiently as expected, because the control voltage is intermittently applied to the voltage controlled oscillator. Even if a plurality of circuits for charging and discharging an intermittent pulse generating circuit are provided to increase charge and discharge capability, thereby shortening the lock-up time, there is a limitation in the improvement, as far as the intermittent pulse is used therein.